The purpose of this test is to measure the memory read latencies.
You can notice 3 different latencies levels. The first small one is related to L1 cache. The second latency is related to L2 cache and the third much larger latency is the DDR memory latency.
The first column is is the size of a block of memory repeatedly read in. The second column is the latency in ns. A small block will be cached, so you see fast latency. A larger block will not fit into cache.